ST STM32F207 Series Reference Manual page 826

Controller area network (bxCAN)
CAN mailbox data low register (CAN_TDLxR) (x=0..2)
All bits of this register are write protected when the mailbox is not in empty state.
Address offsets: 0x188, 0x198, 0x1A8
Reset value: 0xXXXX XXXX
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:24 DATA3[7:0]
Bits 23:16 DATA2[7:0]
Bits 15:8 DATA1[7:0]
Bits 7:0 DATA0[7:0]
CAN mailbox data high register (CAN_TDHxR) (x=0..2)
All bits of this register are write protected when the mailbox is not in empty state.
Address offsets: 0x18C, 0x19C, 0x1AC
Reset value: 0xXXXX XXXX
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:24 DATA7[7:0]
Data byte 7 of the message.
Note: If TGT of this message and TTCM are active, DATA7 and DATA6 will be replaced by
Bits 23:16 DATA6[7:0]
Bits 15:8 DATA5[7:0]
Data byte 5 of the message.
Bits 7:0 DATA4[7:0]
Data byte 4 of the message.
826/1381
28 27 26 25
DATA3[7:0]
rw rw rw rw
12 11 10 9
DATA1[7:0]
rw rw rw rw
:
Data byte 3
Data byte 3 of the message.
:
Data byte 2
Data byte 2 of the message.
:
Data byte 1
Data byte 1 of the message.
:
Data byte 0
Data byte 0 of the message.
A message can contain from 0 to 8 data bytes and starts with byte 0.
28 27 26 25
DATA7[7:0]
rw rw rw rw
12 11 10 9
DATA5[7:0]
rw rw rw rw
:
Data byte 7
the TIME stamp value.
:
Data byte 6
Data byte 6 of the message.
:
Data byte 5
:
Data byte 4
24 23 22
rw rw rw
8 7 6
rw rw rw
24 23 22
rw rw rw
8 7 6
rw rw rw
RM0033 Rev 9
21 20 19 18
DATA2[7:0]
rw rw rw rw
5 4 3 2
DATA0[7:0]
rw rw rw rw
21 20 19 18
DATA6[7:0]
rw rw rw rw
5 4 3 2
DATA4[7:0]
rw rw rw rw
RM0033
17 16
rw rw
1 0
rw rw
17 16
rw rw
1 0
rw rw