Rtc Time Stamp Date Register (Rtc_Tsdr) - ST STM32F207 Series Reference Manual

Real-time clock (RTC)
Bits 11:8 MNU[3:0]: Minute units in BCD format.
Bit 7 Reserved, must be kept at reset value.
Bits 6:4 ST[2:0]: Second tens in BCD format.
Bits 3:0 SU[3:0]: Second units in BCD format.
Note: The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when
TSF bit is reset.
22.6.12

RTC time stamp date register (RTC_TSDR)

Address offset: 0x34
Backup domain reset value: 0x0000 0000
System reset: not affected
31 30 29
15 14 13
WDU[1:0]
r r r
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:13 WDU[1:0]: Week day units
Bit 12 MT: Month tens in BCD format
Bits 11:8 MU[3:0]: Month units in BCD format
Bits 7:6 Reserved, must be kept at reset value.
Bits 5:4 DT[1:0]: Date tens in BCD format
Bit 3:0 DU[3:0]: Date units in BCD format
Note: The content of this register is valid only when TSF is set to 1 in RTC_ISR. It is cleared when
TSF bit is reset.
594/1381
28 27 26 25
12 11 10 9
MT MU[3:0]
r r r r
24 23 22
Reserved
8 7 6
Reserved
r
RM0033 Rev 9
21 20 19 18
5 4 3 2
DT[1:0] DU[3:0]
r r r r
RM0033
17 16
1 0
r r