Mac Interrupts; Figure 330. Reception With No Error; Figure 331. Reception With Errors; Figure 332. Reception With False Carrier Indication - ST STM32F207 Series Reference Manual

Ethernet (ETH): media access control (MAC) with DMA controller
MII_RX_CLK
MII_RX_DV
MII_RXD[3:0]
MII_RX_ERR
MII_RX_CLK
MII_RX_DV
MII_RXD[3:0]
MII_RX_ERR
MII_RX_CLK
MII_RX_DV
MII_RXD[3:0]
MII_RX_ERR
28.5.4

MAC interrupts

Interrupts can be generated from the MAC core as a result of various events.
The ETH_MACSR register describes the events that can cause an interrupt from the MAC
core. You can prevent each event from asserting the interrupt by setting the corresponding
mask bits in the Interrupt Mask register.
866/1381

Figure 330. Reception with no error

PREAMBLE

Figure 331. Reception with errors

PREAMBLE SFD

Figure 332. Reception with false carrier indication

XX XX XX XX
RM0033 Rev 9
SFD
DA DA XX
0E XX XX
RM0033
FCS
ai15634
XX XX
XX XX
ai15635
ai15636