ST STM32F207 Series Reference Manual page 533

RM0033
Note: Writing to the KEYSIZE, DATATYPE, ALGOMODE and ALGODIR bits while BUSY=1 has
no effect. These bits can only be configured when BUSY=0.
The FFLUSH bit has to be set only when BUSY=0. If not, the FIFO is flushed, but the block
being processed may be pushed into the output FIFO just after the flush operation, resulting
in a nonempty FIFO condition.
Bits 5:3 ALGOMODE[2:0]: Algorithm mode
000: TDES-ECB (triple-DES Electronic codebook): no feedback between blocks
of data. Initialization vectors (CRYP_IV0(L/R)) are not used, three key vectors
(K1, K2, and K3) are used (K0 is not used).
001: TDES-CBC (triple-DES Cipher block chaining): output block is XORed with
the subsequent input block before its entry into the algorithm. Initialization
vectors (CRYP_IV0L/R) must be initialized, three key vectors (K1, K2, and K3)
are used (K0 is not used).
010: DES-ECB (simple DES Electronic codebook): no feedback between blocks
of data. Initialization vectors (CRYP_IV0L/R) are not used, only one key vector
(K1) is used (K0, K2, K3 are not used).
011: DES-CBC (simple DES Cipher block chaining): output block is XORed with
the subsequent input block before its entry into the algorithm. Initialization
vectors (CRYP_IV0L/R) must be initialized. Only one key vector (K1) is used
(K0, K2, K3 are not used).
100: AES-ECB (AES Electronic codebook): no feedback between blocks of data.
Initialization vectors (CRYP_IV0L/R...1L/R) are not used. All four key vectors
(K0...K3) are used.
101: AES-CBC (AES Cipher block chaining): output block is XORed with the
subsequent input block before its entry into the algorithm. Initialization vectors
(CRYP_IV0L/R...1L/R) must be initialized. All four key vectors (K0...K3) are
used.
110: AES-CTR (AES counter mode): output block is XORed with the subsequent
input block before its entry into the algorithm. Initialization vectors
(CRYP_IV0L/R...1L/R) must be initialized. All four key vectors (K0...K3) are
used. CTR decryption does not differ from CTR encryption, since the core
always encrypts the current counter block to produce the key stream that will be
XORed with the plaintext or cipher in input. Thus, ALGODIR is don't care when
ALGOMODE = 110b, and the key must NOT be unrolled (prepared) for
decryption.
111: AES key preparation for decryption mode. Writing this value when CRYPEN
= 1 immediately starts an AES round for key preparation. The secret key must
have previously been loaded into the K0...K3 registers. The BUSY bit in the
CRYP_SR register is set during the key preparation. After key processing, the
resulting key is copied back into the K0...K3 registers, and the BUSY bit is
cleared.
Bit 2 ALGODIR: Algorithm direction
0: Encrypt
1: Decrypt
Bits 1:0 Reserved, must be kept at reset value
RM0033 Rev 9
Cryptographic processor (CRYP)
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