ST STM32F207 Series Reference Manual page 532

Cryptographic processor (CRYP)
Bits 31:18 Reserved, must be kept at reset value
Bits 17:16 Reserved, must be kept at reset value
Bits 13:10 Reserved, must be kept at reset value
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Bit 15 CRYPEN: Cryptographic processor enable
0: CRYP processor is disabled
1: CRYP processor is enabled
Note: The CRYPEN bit is automatically cleared by hardware when the key
preparation process ends (ALGOMODE=111b) or GCM_CCM init Phase
Bit 14 FFLUSH: FIFO flush
When CRYPEN = 0, writing this bit to 1 flushes the IN and OUT FIFOs (that is
read and write pointers of the FIFOs are reset. Writing this bit to 0 has no effect.
When CRYPEN = 1, writing this bit to 0 or 1 has no effect.
Reading this bit always returns 0.
Bits 9:8 KEYSIZE[1:0]: Key size selection (AES mode only)
This bitfield defines the bit-length of the key used for the AES cryptographic core.
This bitfield is 'don't care' in the DES or TDES modes.
00: 128 bit key length
01: 192 bit key length
10: 256 bit key length
11: Reserved, do not use this value
Bits 7:6 DATATYPE[1:0]: Data type selection
This bitfield defines the format of data entered in the CRYP_DIN register (refer to
Section 19.3.3: Data
00: 32-bit data. No swapping of each word. First word pushed into the IN FIFO
(or popped off the OUT FIFO) forms bits 1...32 of the data block, the second
word forms bits 33...64.
01: 16-bit data, or half-word. Each word pushed into the IN FIFO (or popped off
the OUT FIFO) is considered as 2 half-words, which are swapped with each
other.
10: 8-bit data, or bytes. Each word pushed into the IN FIFO (or popped off the
OUT FIFO) is considered as 4 bytes, which are swapped with each other.
11: bit data, or bit-string. Each word pushed into the IN FIFO (or popped off the
OUT FIFO) is considered as 32 bits (1st bit of the string at position 0), which are
swapped with each other.
type).
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