Pin Configuration - Hitachi SH7709S Hardware Manual

6.1.3

Pin Configuration

Table 6.1 shows the INTC pin configuration.
Table 6.1 INTC Pins
Name
Nonmaskable interrupt input pin
Interrupt input pins
Port interrupt input pins
Bus request output pin
Abbreviation I/O Description
NMI I Input of interrupt request signal, not
maskable by the interrupt mask bits in
SR.
IRQ5–IRQ0 I Input of interrupt request signals,
IRL3–IRL0
maskable by the interrupt mask bits in
SR.
IRLS3-IRLS0
PINT0–PINT15 I Input of port interrupt request signals,
maskable by the interrupt mask bits in
SR.
IRQOUT
O Output of signal that notifies external
devices that an interrupt source or
memory refresh has occurred
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