Pin Configuration; Register Configuration; System Control Register (Syscr); Irq Status Register (Isr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

5.1.3 Pin Configuration

Table 5-1 lists the interrupt pins.
Table 5-1 Interrupt Pins
Name
Nonmaskable interrupt
External interrupt
request 5, 4, 1, and 0

5.1.4 Register Configuration

Table 5-2 lists the registers of the interrupt controller.
Table 5-2 Interrupt Controller Registers
1
Address* Name
H'FFF2 System control register
H'FFF4 IRQ sense control register
H'FFF5 IRQ enable register
H'FFF6 IRQ status register
H'FFF8 Interrupt priority register A
H'FFF9 Interrupt priority register B
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written, to clear flags.
Abbreviation I/O
NMI Input
IRQ , IRQ
, Input
5 4
and IRQ , IRQ
1 0
Function
Nonmaskable interrupt, rising edge or
falling edge selectable
Maskable interrupts, falling edge or level
sensing selectable
Abbreviation R/W
SYSCR R/W
ISCR R/W
IER R/W
ISR R/(W)*
IPRA R/W
IPRB R/W
Initial Value
H'0B
H'00
H'00
2
H'00
H'00
H'00
83