V-Ramp Test: Qbd_Rmpv User Module - Keithley 4200A-SCS Reference Manual

Model 4200A-SCS Parameter Analyzer Reference Manual

V-ramp test: qbd_rmpv User Module

The V-ramp test uses the qbd_rmpv user module of the wlrlib user library.
Usage
See JEDEC standards
THIN DIELECTRICS."
Some of the descriptions of the following variables are quoted from the JESD35-A standard. The
variables quoted from the standard include this reference identification: (Ref. JESD35-A).
status = qbd_rmpv(int hi_pin, int lo_pin1, int
*HiSMUId, char *LoSMUId1, char *LoSMUId2, char *LoSMUId3, double v_use, double
I_init, int hold_time, double v_start, double v_step, int t_step, int
measure_delay, double I_crit, double I_box, double I_max, double exit_curr_mult,
double exit_slope_mult, double q_max, double t_max, double v_max, double area,
int exit_mode, double *V_stress, int V_size, double *I_stress, int I_size,
double *T_stress, int T_size, double *q_stress, int q_size, double *I_use_pre,
double *I_use_post, double *Q_bd, double *q_bd, double *v_bd, double *I_bd,
double *t_bd, double *v_crit, double *v_box, int *failure_mode, int
*test_status);
Input variables
status
hi_pin
lo_pin1
lo_pin2
lo_pin3
HiSMUId
LoSMUId1
LoSMUId2
LoSMUId3
v_use
I_init
hold_time
v_start
v_step
t_step
measure_delay
4200A-901-01 Rev. C / February 2017
(on page L-2), JESD35-A, "PROCEDURE FOR WAFER-LEVEL TESTING OF
Returned values are placed in the Analyze sheet
High pin (usually the gate pin) (-1 to 72); enter -1 to not connect
Usually for source drain and substrate connection; depending on device structure,
some of those pins are optional; enter -1 to not connect
ID string of the SMU outputting the stress
ID string of the SMU connected to ground terminal; these three IDs can be same
Oxide voltage (V) under normal operating conditions; typically the power supply
voltage of the process; this voltage is used to measure pre- and post-voltage ramp
oxide current (Ref. JESD35-A)
Oxide breakdown failure current when biased at v_use; see Details
Time in ms to hold the first stress (v_start)
Starting voltage (V) for voltage ramp; typical value is v_use (Ref. JESD35-A)
Voltage (V) ramp step height; maximum of 0.1 MV/cm; refer to Details
Voltage ramp step time in ms, used to determine the voltage ramp rate; should be
less or equal than 100 ms (typically 40 ms to 100 ms)
Time delay in ms for measurement after each voltage stress step; should be less
than t_step (ms)
Appendix L: Wafer-level reliability testing
lo_pin2, int lo_pin3, char
L-11