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Timx Counter (Timx_Cnt) - ST STM32F413 Reference Manual

Advanced arm-based 32-bit mcus
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RM0430
18.4.10

TIMx counter (TIMx_CNT)

Address offset: 0x24
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0 CNT[15:0]: Counter value
18.4.11
TIMx prescaler (TIMx_PSC)
Address offset: 0x28
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0 PSC[15:0]: Prescaler value
18.4.12
TIMx auto-reload register (TIMx_ARR)
Address offset: 0x2C
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0
12
11
10
9
rw
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rw
12
11
10
9
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rw
The counter clock frequency CK_CNT is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event.
12
11
10
9
rw
rw
rw
rw
ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to the
Section 18.3.1: Time-base unit on page 525
and behavior.
The counter is blocked while the auto-reload value is null.
General-purpose timers (TIM2 to TIM5)
8
7
6
CNT[15:0]
rw
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8
7
6
PSC[15:0]
rw
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rw
8
7
6
ARR[15:0]
rw
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rw
DocID029473 Rev 3
5
4
3
2
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rw
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rw
5
4
3
2
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rw
/ (PSC[15:0] + 1).
CK_PSC
5
4
3
2
rw
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rw
for more details about ARR update
1
0
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1
0
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1
0
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