Figure 82. Pulses Skipper Operation - ST STM32F413 Reference Manual

Digital filter for sigma delta modulators (DFSDM)
The DFSDM shall be configured as follow:
•
CHINSEL must be set to 0 for all channels (channel data are taken from pins of the
same channel)
•
SPICKSEL must be set to 0 for all channels (in order to select external CKINy as input
clock)
The TIM3 and TIM4 shall be configured as follow:
•
TIM4 outputs (OC[2:1]) and TIM3 outputs (OC[4:1]) must be low in inactive mode
when no gating is required. When the application needs to provide delays to
microphones, then the timers shall be programmed in One Pulse Mode (OPM). In this
mode, the timer allows the counter to be started in response to a rising edge on ETRx
(or ITRx) input and to generate a pulse with a programmable length.
•
The ETRx input must be used when the bitstream clock is generated by the DFSDM2.
• The clock reference used by the timers can be its APB clock or its APB clock multiplied
by 2 or 4. The higher this frequency is, the better it is.
While TIM3 and TIM4 are working with DFSDM2 using ETRx input, the timers
reference clock frequency must be at least 12 times the frequency of the input
bitstream clock, taking the assumption that the bitstream clock duty cycle is 50%. This
is due to the fact that ETRx input have a bigger propagation delay: up to 5 periods of
the timers reference clock.
•
Using these rules will prevent timing violation.
In case it is required to synchronize DFSDM1 and DFSDM2 filter conversions (for example
for beamforming applications), the following sequence should take place (refer to
Figure 81):
•
Enable audio clocks used by DFSDM
•
Program DFSDM to use the CkIn
•
Use the DFSDM2 CkOut to inject the DFSDM2 audio clock to the CkIn
•
Block the DFSDM2 CkOut signals: bit BSCKSEL=0
•
Start all filters conversions (all used DFSDM1 and DFSDM2 filters)
•
Release the DFSDM2 CkOut: bit BSCKSEL=1
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Figure 82. Pulses skipper operation

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RM0430