Syscfg External Interrupt Configuration Register - ST STM32F413 Reference Manual

RM0430
8.2.3

SYSCFG external interrupt configuration register 1

(SYSCFG_EXTICR1)
Address offset: 0x08
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
EXTI3[3:0]
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 EXTIx[3:0]: EXTI x configuration (x = 0 to 3)
8.2.4 SYSCFG external interrupt configuration register 2
(SYSCFG_EXTICR2)
Address offset: 0x0C
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
EXTI7[3:0]
rw rw rw
28 27 26 25
Res. Res. Res.
12 11 10 9
EXTI2[3:0]
rw rw rw rw
These bits are written by software to select the source input for the EXTIx
external interrupt.
0000: PA[x] pin
0001: PB[x] pin
0010: PC[x] pin
0011: PD[x] pin
0100: PE[x] pin
0101: PF[x] pin
0110: PG[x] pin
0111: PH[x] pin (Reserved for EXTI3 and EXTI2 configurations)
Other configurations: reserved
28 27 26 25
Res. Res. Res.
12 11 10 9
EXTI6[3:0]
rw rw rw rw
DocID029473 Rev 3
System configuration controller (SYSCFG)
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
EXTI1[3:0]
rw rw rw rw
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
EXTI5[3:0]
rw rw rw rw
20 19 18 17
Res. Res. Res. Res.
4 3 2 1
EXTI0[3:0]
rw rw rw rw
20 19 18 17
Res. Res. Res. Res.
4 3 2 1
EXTI4[3:0]
rw rw rw rw
16
Res.
0
rw
16
Res.
0
rw
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