ST STM32F413 Reference Manual page 436

Digital filter for sigma delta modulators (DFSDM)
Table 93. DFSDM register map and reset values (continued)
Offset Register
DFSDM_
CH6AWSCDR
0xC8
reset value
DFSDM_
CH6WDATR
0xCC
reset value
DFSDM_
CH6DATINR
0xD0
reset value 0
0xD4 -
Reserved
0xDC
DFSDM_
CH7CFGR1
0xE0
reset value
DFSDM_
CH7CFGR2
0xE4
reset value 0
DFSDM_
CH7AWSCDR
0xE8
reset value
DFSDM_
CH7WDATR
0xEC
reset value
DFSDM_
CH7DATINR
0xF0
reset value 0
0xF4 -
Reserved
0xFC
DFSDM_
FLT0CR1
0x100
reset value
DFSDM_
FLT0CR2
0x104
reset value
DFSDM_
FLT0ISR
0x108
reset value 0
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0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
RCH[2:0]
0 0 0 0 0
0 0
SCDF[7:0]
0 0 0 0 0 0 0 1 1
DocID029473 Rev 3
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
AWDCH[7:0]
0 0 0 0 0 0 0 0
CKABF[7:0]
1 1 1 1 1 1 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
JEXTSEL[4:0]
0 0 0 0 0 0 0
EXCH[7:0]
0 0 0 0 0 0 0 0
0
RM0430
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0 0 0 0
0 0 0 0 0