ST STM32F413 Reference Manual page 1046

Secure digital input/output interface (SDIO)
Bit 19 RXFIFOEIE: Rx FIFO empty interrupt enable
Bit 18 TXFIFOEIE: Tx FIFO empty interrupt enable
Bit 17 RXFIFOFIE: Rx FIFO full interrupt enable
Bit 16 TXFIFOFIE: Tx FIFO full interrupt enable
Bit 15 RXFIFOHFIE: Rx FIFO half full interrupt enable
Bit 14 TXFIFOHEIE: Tx FIFO half empty interrupt enable
Bit 13 RXACTIE: Data receive acting interrupt enable
Bit 12 TXACTIE: Data transmit acting interrupt enable
Bit 11 CMDACTIE: Command acting interrupt enable
Bit 10 DBCKENDIE: Data block end interrupt enable
Bit 9 Reserved, must be kept at reset value.
1046/1284
Set and cleared by software to enable/disable interrupt caused by Rx FIFO empty.
0: Rx FIFO empty interrupt disabled
1: Rx FIFO empty interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Tx FIFO empty.
0: Tx FIFO empty interrupt disabled
1: Tx FIFO empty interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Rx FIFO full.
0: Rx FIFO full interrupt disabled
1: Rx FIFO full interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Tx FIFO full.
0: Tx FIFO full interrupt disabled
1: Tx FIFO full interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Rx FIFO half full.
0: Rx FIFO half full interrupt disabled
1: Rx FIFO half full interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Tx FIFO half empty.
0: Tx FIFO half empty interrupt disabled
1: Tx FIFO half empty interrupt enabled
Set and cleared by software to enable/disable interrupt caused by data being received (data
receive acting).
0: Data receive acting interrupt disabled
1: Data receive acting interrupt enabled
Set and cleared by software to enable/disable interrupt caused by data being transferred
(data transmit acting).
0: Data transmit acting interrupt disabled
1: Data transmit acting interrupt enabled
Set and cleared by software to enable/disable interrupt caused by a command being
transferred (command acting).
0: Command acting interrupt disabled
1: Command acting interrupt enabled
Set and cleared by software to enable/disable interrupt caused by data block end.
0: Data block end interrupt disabled
1: Data block end interrupt enabled
DocID029473 Rev 3
RM0430