ST STM32F413 Reference Manual page 441

RM0430
Table 93. DFSDM register map and reset values (continued)
Offset Register
DFSDM_
FLT3FCR
0x294
reset value 0
DFSDM_
FLT3JDATAR
0x298
reset value 0
DFSDM_
FLT3RDATAR
0x29C
reset value 0
DFSDM_
FLT3AWHTR
0x2A0
reset value 0
DFSDM_
FLT3AWLTR
0x2A4
reset value 0
DFSDM_
FLT3AWSR
0x2A8
reset value
DFSDM_
FLT3AWCFR
0x2AC
reset value
DFSDM_
FLT3EXMAX
0x2B0
reset value 1
DFSDM_
FLT3EXMIN
0x2B4
reset value 0
DFSDM_
FLT3CNVTIMR
0x2B8
reset value 0
0x2BC -
Reserved
0x3FC
Refer to
boundary addresses.
0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
Section 2.2.2: Memory map and register boundary addresses
Digital filter for sigma delta modulators (DFSDM)
FOSR[9:0]
0 0 0 0 0 0 0
JDATA[23:0]
0 0 0 0 0 0 0 0
RDATA[23:0]
0 0 0 0 0 0 0 0
AWHT[23:0]
0 0 0 0 0 0 0 0
AWLT[23:0]
0 0 0 0 0 0 0 0
0
0
EXMAX[23:0]
0 0 0 0 0 0 0 0
EXMIN[23:0]
1 1 1 1 1 1 1 1
CNVCNT[27:0]
0 0 0 0 0 0 0 0
DocID029473 Rev 3
0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
AWHTF[7:0]
0 0 0 0 0 0 0 0 0
CLRAWHTF[7:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0
1 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0
for the register
IOSR[7:0]
0 0 0 0 0 0
0 0 0
RDATA
CH[2:0]
0 0 0 0
BKAWH[3:0]
0 0 0 0
BKAWL[3:0]
0 0 0 0
AWLTF[7:0]
0 0 0 0 0 0
CLRAWLTF[7:0]
0 0 0 0 0 0
0 0 0
0 0 0
0 0
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