Card Functional Description - ST STM32F413 Reference Manual

RM0430
Example of write procedure using DMA
Send CMD24 (WRITE_BLOCK) as follows:
a)
b)
c)
d)
e)
f)
DMA configuration for SDIO controller
a)
b)
c)
d)
e)
f)
Note: SDIO host allows only to use the DMA in peripheral flow controller mode. DMA stream used
to serve SDIO must be configured in peripheral flow controller mode
SDIO generates only DMA burst requests to DMA controller. DMA must be configured in
incremental burst mode on peripheral side.
31.4

Card functional description

31.4.1 Card identification mode
While in card identification mode the host resets all cards, validates the operation voltage
range, identifies cards and sets a relative card address (RCA) for each card on the bus. All
data communications in the card identification mode use the command line (CMD) only.
Program the SDIO data length register (SDIO data timer register should be
already programmed before the card identification process)
Program DMA channel (refer to
Program the SDIO argument register with the address location of the card from
where data is to be transferred
Program the SDIO command register: CmdIndex with 24(WRITE_BLOCK);
WaitResp with '1' (SDIO card host waits for a response); CPSMEN with '1' (SDIO
card host enabled to send a command). Other fields are at their reset value.
Wait for SDIO_STA[6] = CMDREND interrupt, then Program the SDIO data control
register: DTEN with '1' (SDIO card host enabled to send data); DTDIR with '0'
(from controller to card); DTMODE with '0' (block data transfer); DMAEN with '1'
(DMA enabled); DBLOCKSIZE with 0x9 (512 bytes). Other fields are don't care.
Wait for SDIO_STA[10] = DBCKEND, (DBCKEND is set in case of no errors)
Enable DMA2 controller and clear any pending interrupts.
Program the DMA2_Stream3 (or DMA2_Stream6) Channel4 source address
register with the memory location base address and DMA2_Stream3 (or
DMA2_Stream6) Channel4 destination address register with the SDIO_FIFO
register address.
Program DMA2_Stream3 (or DMA2_Stream6) Channel4 control register (memory
increment, not peripheral increment, peripheral and source width is word size).
Program DMA2_Stream3 (or DMA2_Stream6) Channel4 to select the peripheral
as flow controller (set PFCTRL bit in DMA_S3CR (or DMA_S6CR) configuration
register).
Configure the incremental burst transfer to 4 beats (at least from peripheral side)
in DMA2_Stream3 (or DMA2_Stream6) Channel4.
Enable DMA2_Stream3 (or DMA2_Stream6) Channel4
DocID029473 Rev 3
Secure digital input/output interface (SDIO)
DMA configuration for SDIO controller)
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