ST STM32F413 Reference Manual page 180

Reset and clock control (RCC) for STM32F413/423
Table 24. RCC register map and reset values for STM32F413/423 (continued)
Addr. Register
offset name
RCC_
0x80
SSCGR
RCC_
0x84
PLLI2SCFGR
0x88
RCC_
0x8C
DCKCFGR
0x90 CKGATENR
RCC_
0x94
DCKCFGR2
1. Only available for STM32F423xx.
Refer to
180/1284
Table 1 on page 56 for the register boundary addresses.
INCSTEP[14:0]
Reserved
DocID029473 Rev 3
MODPER[11:0]
PLLI2SN[8:0]] PLLI2SM[5:0]
PLLDIVR[4:0]] PLLI2SDIVR[4:0]]
RM0430