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Table 58. Fsmc_Bcrx Bit Fields - ST STM32F413 Reference Manual

Advanced arm-based 32-bit mcus
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RM0430
The differences compared with Mode1 are the toggling of NOE and the independent read
and write timings.
Bit number
31:22
21
20
19
18:16
15
14
13
12
11
10
9
8
7
6
5:4
Figure 41. ModeC write access waveforms

Table 58. FSMC_BCRx bit fields

Bit name
Reserved
0x000
WFDIS
As needed
CCLKEN
As needed
CBURSTRW
0x0 (no effect in asynchronous mode)
CPSIZE
0x0 (no effect in asynchronous mode)
ASYNCWAIT
Set to 1 if the memory supports this feature. Otherwise keep at 0.
EXTMOD
0x1
WAITEN
0x0 (no effect in asynchronous mode)
WREN
As needed
WAITCFG
Don't care
Reserved
0x0
WAITPOL
Meaningful only if bit 15 is 1
BURSTEN
0x0
Reserved
0x1
FACCEN
0x1
MWID
As needed
DocID029473 Rev 3
Flexible static memory controller (FSMC)
Value to set
279/1284
303

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