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ST STM32F413 Reference Manual page 85

Advanced arm-based 32-bit mcus
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RM0430
Bit 31 SPRMOD: Selection of Protection Mode of nWPRi bits
0: PCROP disabled, nWPRi bits used for Write Protection on sector i
1: PCROP enabled, nWPRi bits used for PCROP Protection on sector i
Bit 30 nWRP14_15: Not write protect
This bit contains the value of the write-protection option byte of sectors 14 and 15. They can
be written to program a new write protect value into Flash memory. Sectors 14 and 15 are
linked together and cannot be programmed separately
0: Write protection active on sectors 14 and 15
1: Write protection not active on sectors 14 and 15
These bits contain the value of the write-protection and read-protection (PCROP) option
bytes for sectors 14 and 15 after reset. They can be written to program a new write-protect
or PCROP value into Flash memory.
If SPRMOD is reset:
0: Write protection active on sectors 14 and 15
1: Write protection not active on sectors 14 and 15
If SPRMOD is set:
0: PCROP protection not active on sectors 14 and 15
1: PCROP protection active on sectors 14 and 15
Bits 29:16 nWRP[13:0]: Not write protect
These bits contain the value of the write-protection option bytes of sectors after reset. They
can be written to program a new write protect value into Flash memory.
0: Write protection active on selected sector
1: Write protection not active on selected sector
These bits contain the value of the write-protection and read-protection (PCROP) option
bytes for sectors 0 to 13 after reset. They can be written to program a new write-protect or
PCROP value into Flash memory.
If SPRMOD is reset:
0: Write protection active on sector i
1: Write protection not active on sector i
If SPRMOD is set:
0: PCROP protection not active on sector i
1: PCROP protection active on sector i
Bits 15:8 RDP: Read protect
These bits contain the value of the read-protection option level after reset. They can be
written to program a new read protection value into Flash memory.
0xAA: Level 0, read protection not active
0xCC: Level 2, chip read protection active
Others: Level 1, read protection of memories active
Bits 7:5 USER: User option bytes
These bits contain the value of the user option byte after reset. They can be written to
program a new user option byte value into Flash memory.
Bit 7: nRST_STDBY
Bit 6: nRST_STOP
Bit 5: WDG_SW
Note: When changing the WDG mode from hardware to software or from software to
Bit 4 Reserved, must be kept cleared. Always read as "0".
hardware, a system reset is required to make the change effective.
DocID029473 Rev 3
Embedded Flash memory interface
85/1284
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