Standby Mode - ST STM32F413 Reference Manual

Power controller (PWR)
Stop mode
Mode exit
Wakeup latency
5.3.6

Standby mode

The Standby mode allows to achieve the lowest power consumption. It is based on the
®
Cortex -M4 with FPU deepsleep mode, with the voltage regulator disabled. The 1.2 V
domain is consequently powered off. The PLLs, the HSI oscillator and the HSE oscillator are
also switched off. SRAM and register contents are lost except for registers in the backup
domain (RTC registers and RTC backup register), and Standby circuitry (see
Entering Standby mode
The Standby mode is entered according to
SLEEPDEEP bit in the Cortex
Refer to
In Standby mode, the following features can be selected by programming individual control
bits:
•
Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a reset. See
Section 22.3
•
Real-time clock (RTC): this is configured by the RTCEN bit in the backup domain
control register (RCC_BDCR)
•
Internal RC oscillator (LSI RC): this is configured by the LSION bit in the Control/status
register (RCC_CSR).
• External 32.768 kHz oscillator (LSE OSC): this is configured by the LSEON bit in the
backup domain control register (RCC_BDCR)
Exiting Standby mode
The Standby mode is exited according to
flag in PWR_CR (see
indicates that the MCU was in Standby mode. All registers are reset after wakeup from
Standby except for PWR_CR.
106/1284
Table 21. Stop mode entry and exit
If WFI or Return from ISR was used for entry:
Any EXTI lines configured in Interrupt mode (the corresponding EXTI
Interrupt vector must be enabled in the NVIC). The interrupt source can
be external interrupts or peripherals with wakeup capability. Refer to
Table 40: Vector table for
If WFE was used for entry and SEVONPEND = 0
Any EXTI lines configured in event mode. Refer to
Wakeup event
If WFE was used for entry and SEVONPEND = 1:
– Any EXTI lines configured in Interrupt mode (even if the corresponding
EXTI Interrupt vector is disabled in the NVIC). The interrupt source can
be an external interrupt or a peripheral with wakeup capability. Refer to
Table 40: Vector table for
– Wakeup event: refer to
See Table 20: Stop operating modes
®
Table 22 for more details on how to enter Standby mode.
in Section 22: Independent watchdog
Section 5.4.2: PWR power control/status register
STM32F413/423.
management.
STM32F413/423.
Section 10.2.3: Wakeup event
Section : Entering low-power
-M4 with FPU System Control register is set.
Section : Exiting low-power
DocID029473 Rev 3
Description
Section 10.2.3:
mode, when the
(IWDG).
mode. The SBF status
(PWR_CSR))
RM0430
management.
Figure 8).