I/O Compensation Cell - ST STM32F413 Reference Manual

Advanced arm-based 32-bit mcus

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System configuration controller (SYSCFG)

The system configuration controller is mainly used to remap the memory accessible in the

code area and manage the external interrupt line connection to the GPIOs.

I/O compensation cell

By default the I/O compensation cell is not used. However when the I/O output buffer speed

is configured in 50 MHz or 100 MHz mode, it is recommended to use the compensation cell

for slew rate control on I/O t

When the compensation cell is enabled, a READY flag is set to indicate that the

compensation cell is ready and can be used. The I/O compensation cell can be used only

when the supply voltage ranges from 2.4 to 3.6 V.

SYSCFG registers

SYSCFG memory remap register (SYSCFG_MEMRMP)

This register is used for specific configurations on memory remap:

Two bits are used to configure the type of memory accessible at address 0x0000 0000.

These bits are used to select the physical remap by software and so, bypass the BOOT

After reset these bits take the value selected by the BOOT pins. When booting from

main Flash memory with BOOT0 pin set to 0, this register takes the value 0x00.

In remap mode, the CPU can access the external memory via ICode bus instead of System

bus which boosts up the performance.

Address offset: 0x00

Reset value: 0x0000 000X (X is the memory mode selected by the BOOT pins)

DocID029473 Rev 3

System configuration controller (SYSCFG)

commutation to reduce the I/O noise on power