Figure 256. Master Initialization Flowchart - ST STM32F413 Reference Manual

RM0430
Note: The START bit is reset by hardware when the slave address has been sent on the bus,
whatever the received acknowledge value. The START bit is also reset by hardware if an
arbitration loss occurs.
In 10-bit addressing mode, when the Slave Address first 7 bits is NACKed by the slave, the
master will re-launch automatically the slave address transmission until ACK is received. In
this case ADDRCF must be set if a NACK is received from the slave, in order to stop
sending the slave address.
If the FMPI2C is addressed as a slave (ADDR=1) while the START bit is set, the FMPI2C
switches to slave mode and the START bit is cleared when the ADDRCF bit is set.
Note: The same procedure is applied for a Repeated Start condition. In this case BUSY=1.
Initialization of a master receiver addressing a 10-bit address slave
•
If the slave address is in 10-bit format, the user can choose to send the complete read
sequence by clearing the HEAD10R bit in the FMPI2C_CR2 register. In this case the
master automatically sends the following complete sequence after the START bit is set:
(Re)Start + Slave address 10-bit header Write + Slave address 2nd byte + REStart +
Slave address 10-bit header Read
Fast-mode Plus Inter-integrated circuit (FMPI2C) interface

Figure 256. Master initialization flowchart

Figure 257. 10-bit address read access with HEAD10R=0
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