Sleep Mode - ST STM32F413 Reference Manual

RM0430
5.3.3

Sleep mode

Entering Sleep mode
The Sleep mode is entered according to
SLEEPDEEP bit in the Cortex
Refer to
Note: All interrupt pending bits must be cleared before the sleep mode entry.
Exiting Sleep mode
The Sleep mode is exited according to
Refer to
Sleep-now mode
Mode entry
Mode exit
Wakeup latency
Sleep-on-exit
Mode entry
®
Table 16 and Table 17
Table 16 and Table 17
Table 16. Sleep-now entry and exit
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP = 0, and
– No interrupt (for WFI) or event (for WFE) is pending.
Refer to the Cortex
On Return from ISR while:
– SLEEPDEEP = 0 and
– SLEEPONEXIT = 1,
– No interrupt is pending.
Refer to the Cortex
If WFI or Return from ISR was used for entry:
Interrupt: Refer to
If WFE was used for entry and SEVONPEND = 0
Wakeup event: Refer to
f WFE was used for entry and SEVONPEND = 1
Interrupt even when disabled in NVIC: refer to
STM32F413/423
management).
None
Table 17. Sleep-on-exit entry and exit
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP = 0, and
– No interrupt (for WFI) or event (for WFE) is pending.
Refer to the Cortex
On Return from ISR while:
– SLEEPDEEP = 0, and
– SLEEPONEXIT = 1, and
– No interrupt is pending.
Refer to the Cortex
Section : Entering low-power
-M4 with FPU System Control register is cleared.
for details on how to enter Sleep mode.
Section : Exiting low-power
for more details on how to exit Sleep mode.
®
-M4 with FPU System Control register.
®
-M4 with FPU System Control register.
Table 40: Vector table for STM32F413/423
Section 10.2.3: Wakeup event management
or Wakeup event (see
®
-M4 with FPU System Control register.
®
-M4 with FPU System Control register.
DocID029473 Rev 3
Power controller (PWR)
mode, when the
mode.
Description
Table 40: Vector table for
Section 10.2.3: Wakeup event
Description
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