Sai Xdata Register (Sai_Xdr) Where X Is A Or B - ST STM32F413 Reference Manual

RM0430
30.17.8

SAI xData register (SAI_xDR) where x is A or B

Address offset: block A: 0x020
Address offset: block B: 0x040
Reset value: 0x0000 0000
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:0 DATA[31:0]: Data
A write into this register has the effect of loading the FIFO if the FIFO is not full.
A read from this register has to effect of draining-up the FIFO if the FIFO is not empty.
30.17.9 SAI register map
The following table summarizes the SAI registers.
Register
Offset and reset
value
0x0004
SAI_xCR1
or
0x002
4
Reset value
0x0008
SAI_xCR2
or
0x002
Reset
8
value
0x000C
SAI_xFRCR
or
0x002
C
Reset value
SAI_xSLOT
0x0010
R
or
0x003
Reset
0
0 0 0 0 0 0 0 0
value
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw
Table 165. SAI register map and reset values
0 0 0 0 0
SLOTEN[15:0]
0 0
DocID029473 Rev 3
24 23 22 21
DATA[31:16]
rw rw rw rw
8 7 6 5
DATA[15:0]
rw rw rw rw
0 0
COM
P[1:0
]
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
Serial audio interface (SAI)
20 19 18
rw rw rw
4 3 2
rw rw rw
SYN
CEN[ DS[2:0]
1:0]
0 0 0 0 0 0 0 1 0
MUTECN[5:0]
FSALL[6:0]
SLO
NBSLOT[3:0] TSZ[
1:0}
0 0 0 0 0 0
17 16
rw rw
1 0
rw rw
PRT MOD
CFG[ E[1:0
1:0] ]
0 0 0 0
FRL[7:0]
0 0 1 1 1
FBOFF[4:0]
0 0 0 0 0
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