Oversampling By 8 - ST STM32F413 Reference Manual

Universal synchronous asynchronous receiver transmitter (USART)
Table 149. Error calculation for programmed baud rates at f
Baud rate
S.No Desired

8.

896 KBps
9. 921.6 KBps
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 150. Error calculation for programmed baud rates at f
Baud rate
S.No Desired
1. 2.4 KBps
2. 9.6 KBps
3. 19.2 KBps
4. 57.6 KBps
5. 115.2 KBps
6. 230.4 KBps
7. 460.8 KBps
8. 896 KBps
9. 921.6 KBps
10. 1.792 MBps
11. 1.8432 MBps
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
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oversampling by 16
Oversampling by 16 (OVER8=0)
f = 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
NA NA
NA NA

oversampling by 8

Oversampling by 8 (OVER8=1)
f = 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
2.400 KBps 416.625
9.604 KBps 104.125
19.185 KBps 52.125
57.557 KBps 17.375
115.942 KBps 8.625
228.571 KBps 4.375
470.588 KBps 2.125
888.889 KBps 1.125
888.889 KBps 1.125
NA NA
NA NA
DocID029473 Rev 3
PCLK
(1)
(continued)
% Error =
(Calculated -
Actual
Desired)B.Rate
/Desired B.Rate
NA 888.889 KBps
NA 941.176 KBps
PCLK
(1)
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
0.01% 2.400 KBps
0.04% 9.598 KBps
0.08% 19.208 KBps
0.08% 57.554 KBps
0.64% 115.108 KBps
0.79% 231.884 KBps
2.12% 457.143 KBps
0.79% 888.889 KBps
3.55% 941.176 KBps
NA 1.7777 MBps
NA 1.7777 MBps
= 8 MHz or f = 16 MHz,
PCLK
f = 16 MHz
PCLK
Value
programmed
in the baud
rate register
1.1250
1.0625
= 8 MHz or f = 16 MHz,
PCLK
f = 16 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
833.375
208.375
104.125
34.750
17.375
8.625
4.375
2.250
2.125
1.125
1.125
RM0430
% Error
0.79%
2.12%
%
Error
0.00%
0.02%
0.04%
0.08%
0.08%
0.64%
0.79%
0.79%
2.12%
0.79%
3.55%