Software Interrupt Event Register (Exti_Swier) - ST STM32F413 Reference Manual

Interrupts and events
10.3.5

Software interrupt event register (EXTI_SWIER)

Address offset: 0x10
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
SWIER SWIER SWIER SWIER
15 14 13
rw rw rw
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:21 SWIER[22:21]: Software Interrupt on line x
If interrupt are enabled on line x in the EXTI_IMR register, writing '1' to SWIERx bit when it is
set at '0' sets the corresponding pending bit in the EXTI_PR register, thus resulting in an
interrupt request generation.
This bit is cleared by clearing the corresponding bit in EXTI_PR (by writing a 1 to the bit).
Bits 20:19 Reserved, must be kept at reset value.
Bits 18:0 SWIER[18:0: Software Interrupt on line x
If interrupt are enabled on line x in the EXTI_IMR register, writing '1' to SWIERx bit when it is
set at '0' sets the corresponding pending bit in the EXTI_PR register, thus resulting in an
interrupt request generation.
This bit is cleared by clearing the corresponding bit in EXTI_PR (by writing a 1 to the bit).
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28 27 26 25
Res. Res. Res.
12 11 10 9
SWIER SWIER SWIER
12 11 10 9
rw rw rw rw
DocID029473 Rev 3
24 23 22 21
SWIER SWIER
Res. Res.
22 21
rw rw
8 7 6
SWIER SWIER SWIER SWIER
8 7 6
rw rw rw rw
20 19 18
SWIER
Res. Res.
18
rw
5 4 3 2
SWIER SWIER SWIER
5 4 3 2
rw rw rw
RM0430
17 16
SWIER SWIER
17 16
rw rw
1 0
SWIER SWIER
1 0
rw rw