Motorola MPC533 Reference Manual page 436

UIMB Block Diagram
• Simple "slave only" U-bus interface implementation
— Transparent mode operation not supported
— Relinquish and retry not supported
• Supports scan control for modules on the IMB3 and on the U-bus
Modules on the IMB3 bus can only be reset by SRESET. Some
modules may have a module reset, as well.
The user should not perform instruction fetches from modules
on the IMB.
12.2 UIMB Block Diagram
U-bus
Figure 12-1. UIMB Interface Module Block Diagram
12.3 Clock Module
The clock module within the UIMB interface generates the IMB clock. The IMB clock is
the main timing reference used within the IMB modules.
The IMB clock is generated based on the STOP and HSPEED bits in the UIMB module
configuration register (UMCR). If the STOP bit is 1, the IMB clock is not generated. If the
STOP bit is 0 and the HSPEED bit is 0, the IMB clock is generated as the inversion of the
internal system clock. This is the same frequency as the CLKOUT if EBDF is 0b00 – full
12-2
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
NOTE
WARNING
U-bus
Interface
Address
IMB3
Decode
Interface
Data
Mux
Scan Control
Interrupt
Synchronizer
Clock Control
MPC533 Reference Manual
IMB3
MOTOROLA