Motorola MPC533 Reference Manual page 833

Table of Contents

Advertisement

19.2.1.4 UC3F EEPROM High Voltage Control Register (UC3FCTL)
The UC3F EEPROM high voltage control register is used to control the program and erase
operations of the UC3F EEPROM module.
MSB
1
0
Field HVS PEGOOD PEFI EPEE B0EM
HRESET
0
0
16
17
Field
HRESET
Addr
1 Value is set by the current status of the EPEE signal.
2 Value is set by the current status of the B0EPEE signal.
Figure 19-3. UC3F EEPROM High Voltage Control Register (UC3FCTL)
Bits
Name
0
HVS
High voltage status. The HVS bit is for status only, and writes to HVS have no effect. During a
program or erase operation, HVS is set (HVS = 1) to indicate when high voltage operations are
in progress. The HVS bit will negate itself when the program or erase operation completes
successfully, EHV negates during program or erase to terminate the program/erase operation,
HSUS is asserted to suspend the program/erase operation, resetting the module, or the internal
hardware program/erase controller times out.
0 no program or erase of the UC3F array or shadow information or CENSOR bits in progress
1 program or erase of the UC3F array or shadow information or CENSOR bits in progress
1
PEGOOD Program/erase operation result. The PEGOOD bit is for status only. At the completion of a
program or erase operation using the embedded hardware algorithm, the hardware algorithm will
change the state of the PEGOOD bit to reflect whether or not the program or erase operation
was successful.
Note: PEGOOD will be set under the following conditions:
• No failure occurred
• No program or erase operation was requested
The PEGOOD bit is only valid after the hardware program/erase algorithm has cleared HVS.
PEGOOD is reset when either EHV is asserted or SES is cleared. See Figure 19-4 for a timing
diagram of when PEGOOD is valid.
0 program or erase operation failed
1 program or erase operation was successful
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
2
3
4
5
1
2
0
X
X
18
19
20
21
BLOCK
0000_0000_0000_0000
Table 19-5. UC3FCTL Bit Descriptions
Chapter 19. CDR3 Flash (UC3F) EEPROM
6
7
8
9
000_0000_0000
22
23
24
25
CSC
0x2F C808
Description
Programming Model
10
11
12
13
26
27
28
29
HSUS
PE
14
15
SBBLOCK
30
LSB
31
SES EHV
19-11

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mpc534

Table of Contents