Motorola MPC533 Reference Manual page 23

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Number
17.9.8.1 MDASM Registers Organization ............................................................ 17-39
17.9.8.2 MDASM Data A (MDASMAR) Register ............................................... 17-41
17.9.8.3 MDASM Data B (MDASMBR) Register................................................ 17-42
17.9.8.4 MDASM Status/Control Register (MDASMSCRD) (Duplicated) ......... 17-42
17.9.8.5 MDASM Status/Control Register (MDASMSCR) ................................. 17-43
17.10 MIOS14 Pulse Width Modulation Submodule (MPWMSM).......................... 17-45
17.10.1 MPWMSM Terminology ............................................................................. 17-46
17.10.2 MPWMSM Features .................................................................................... 17-47
17.10.3 MPWMSM Description............................................................................... 17-47
17.10.3.1 Clock Selection........................................................................................ 17-48
17.10.3.2 Counter .................................................................................................... 17-48
17.10.3.3 Period Register......................................................................................... 17-49
17.10.3.4 Pulse Width Registers .............................................................................. 17-50
17.10.3.5 Duty Cycles (0% and 100%) ................................................................... 17-51
17.10.3.6 Pulse/Frequency Range Table.................................................................. 17-51
17.10.3.7 MPWMSM Status and Control Register (SCR) ...................................... 17-53
17.10.3.8 MPWMSM Interrupt ............................................................................... 17-53
17.10.3.9 MPWMSM Port Functions ...................................................................... 17-53
17.10.3.10 MPWMSM Data Coherency.................................................................... 17-53
17.10.4 Modular Input/Output Bus (MIOS14) Interface.......................................... 17-54
17.10.5 Effect of RESET on MPWMSM ................................................................. 17-54
17.10.6 MPWMSM Registers................................................................................... 17-54
17.10.6.1 MPWMSM Registers Organization......................................................... 17-54
17.10.6.2 MPWMSM Period Register (MPWMPERR).......................................... 17-57
17.10.6.3 MPWMSM Pulse Width Register (MPWMPULR)................................. 17-57
17.10.6.4 MPWMSM Counter Register (MPWMCNTR)....................................... 17-57
17.10.6.5 MPWMSM Status/Control Register (MPWMSCR)................................ 17-58
17.11 MIOS14 16-bit Parallel Port I/O Submodule (MPIOSM) ............................... 17-60
17.11.1 MPIOSM Features ....................................................................................... 17-61
17.11.2 MPIOSM Signal Functions.......................................................................... 17-61
17.11.3 MPIOSM Description .................................................................................. 17-61
17.11.3.1 MPIOSM Port Function........................................................................... 17-61
17.11.3.2 Non-Bonded MPIOSM Pads ................................................................... 17-62
17.11.4 Modular I/O Bus (MIOB) Interface............................................................. 17-62
17.11.5 Effect of RESET on MPIOSM .................................................................... 17-62
17.11.6 MPIOSM Testing......................................................................................... 17-62
17.11.7 MPIOSM Registers...................................................................................... 17-62
17.11.8 MPIOSM Register Organization ................................................................. 17-62
17.11.8.1 MPIOSM Data Register (MPIOSMDR).................................................. 17-63
17.11.8.2 MPIOSM Data Direction Register (MPIOSMDDR)............................... 17-63
17.12 MIOS14 Interrupts ........................................................................................... 17-63
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
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