Motorola MPC533 Reference Manual page 794

MIOS14 Interrupts
17.12.6 MBISM Interrupt Registers
Table 17-42 shows the MBISM interrupt registers.
Table 17-42. MBISM Interrupt Registers Address Map
Address
0x30 6C30 MIOS14 Interrupt Level Register 0 (MIOS14LVL0)
0x30 6C70 MIOS14 Interrupt Level Register 1 (MIOS14LVL1)
17.12.6.1 MIOS14 Interrupt Level Register 0 (MIOS14LVL0)
This register contains the interrupt level that applies to the submodules numbers 15 to zero.
MSB 1
0
Field —
SRESET
Addr
Figure 17-40. MIOS14 Interrupt Level Register 0 (MIOS14LVL0)
Bits Name
0:4 — Reserved
5:7 LVL Interrupt request level. This field represents one of eight possible levels.
8:9 TM Time multiplexing. This field determines the multiplexed time slot
10:15 — Reserved
17.12.6.2 MIOS14 Interrupt Level Register 1 (MIOS14LVL1)
This register contains the interrupt level that applies to the submodules number 15 to zero.
MSB 1
0
Field —
SRESET
Addr
Figure 17-41. MIOS14 Interrupt Level Register 1 (MIOS14LVL1)
17-70
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
See Table 17-43 for bit descriptions.
See Table 17-44 for bit descriptions.
2 3 4 5
LVL
0000_0000_0000_0000
Table 17-43. MIOS14LVL0 Bit Descriptions
2 3 4 5
LVL
0000_0000_0000_0000
MPC533 Reference Manual
Register
6 7 8 9
TM
0x30 6C30
Description
6 7 8 9
TM
0x30 6C70
10 11 12 13
—
10 11 12 13
—
MOTOROLA
14 LSB
15
14 LSB
15