Motorola MPC533 Reference Manual page 220

System Configuration and Protection Features
accesses is less than four clocks. The external master access and retry timings are described
in Section 9.5.12, "Bus Operation in External Master Modes."
The external master may access the internal MPC533 special registers that are located
outside the RCPU. To access one of these special purpose registers (see Section 5.1.1,
"USIU Special-Purpose Registers"), EMCR[CONT] must be set and EMCR[SUPU] must
be cleared. The external master can then access the special register when it is provided the
address according to the MPC533 address map. Only the first external master access that
follows EMCR setting will be assigned to the special register map; any subsequent accesses
will be directed to the normal address map. This is done in order to enable access to the
EMCR again after the required MPC533 special register access.
Peripheral mode does not require external bus arbitration between the external master and
the internal RCPU, since the internal RCPU is disabled. The BR and BB signals should be
connected to ground, and the internal bus arbitration should be selected in order to prevent
the "slave" MPC533 from occupying the external bus. Internal bus arbitration is selected
by clearing SIUMCR[EARB] (see Section 6.2.2.1.1, "SIU Module Configuration Register
(SIUMCR)").
6.1.2.2 Address Decoding for External Accesses
During an external master access, the USIU compares the external address with the internal
address block to determine if MPC533 operation is required. Since only 24 of the 32
internal address bits are available on the external bus, the USIU assigns zeros to the most
significant address bits (ADDR[0:7]).
The address compare sequence can be summarized as follows:
Normal external access. If the CONT bit in EMCR is cleared, the address is compared to
the internal address map. Refer to Section 6.2.2.1.3, "External Master Control Register
(EMCR)".
• MPC533 special register external access. If the CONT bit in EMCR is set by the
previous external master access, the address is compared to the MPC533 special
address range. See Section 5.1.1, "USIU Special-Purpose Registers," for a list of the
SPRs in the USIU.
• Memory controller external access. If the first two comparisons do not match, the
internal memory controller determines whether the address matches an address
assigned to one of the regions. If it finds a match, the memory controller generates
the appropriate chip select and attribute accordingly
When trying to fetch an MPC533 special register from an external master, the address
might be aliased to one of the external devices on the external bus. If this device is selected
by the MPC533 internal memory controller, this aliasing does not occur since the chip
select is disabled. If the device has its own address decoding or is being selected by external
logic, this case is resolved.
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PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
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