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Bits
Name
0:15
PITC
Periodic interrupt timing count. This field contains the 16-bit value to be loaded into the modulus
counter that is loaded into the periodic timer. This register is readable and writable at any time.
16:31
—
Reserved
6.2.2.4.10
Periodic Interrupt Timer Register (PITR)
The periodic interrupt register is a read-only register that shows the current value in the
periodic interrupt down counter. Read or writing this register does not affect the register.
MSB
1
2
0
Field
Reset
16
17
18
Field
Reset
Addr
Figure 6-40. Periodic Interrupt Timer Register (PITR)
Bits
Name
0:15
PIT
Periodic interrupt timing count—This field contains the current count remaining for the periodic
timer. Writes have no effect on this field.
16:31
—
Reserved
6.2.2.5
General-Purpose I/O Registers
6.2.2.5.1
SGPIO Data Register 1 (SGPIODT1)
MSB
1
2
0
Field
Reset
16
17
18
Field
Reset
Addr
Figure 6-41. SGPIO Data Register 1 (SGPIODT1)
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table 6-21. PITC Bit Descriptions
3
4
5
6
19
20
21
22
Table 6-22. PIT Bit Descriptions
3
4
5
6
SGPIOD[0:7]
0000_0000_0000_0000
19
20
21
22
SGPIOD[16:23]
0000_0000_0000_0000
Chapter 6. System Configuration and Protection
Memory Map and Register Definitions
Description
7
8
9
10
PIT
Unaffected
23
24
25
26
—
Unaffected
0x2F C248
Description
7
8
9
10
23
24
25
26
SGPIOD[24:31]
0x2F C024
11
12
13
14
27
28
29
30
11
12
13
14
SGPIOD[8:15]
27
28
29
30
15
LSB
31
15
LSB
31
6-47
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