Motorola MPC533 Reference Manual page 475

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Unimplemented bits are read as zeros, and write operations do not have any effect. See
Figure 13-17 for a diagram of the result word table
While there is only one result word table, the data can be accessed in three different data
formats:
• Right justified in the 16-bit word, with zeros in the higher order unused bits
• Left justified, with the most significant bit inverted to form a sign bit, and zeros in
the unused lower order bits
• Left justified, with zeros in the lower order unused bits
The left justified, signed format corresponds to a half-scale, offset binary, two's
complement data format. The data is routed onto the IMB3 according to the selected
format. The address used to access the table determines the data alignment format. All write
operations to the result word table are right justified.
MSB
1
0
Field
SRESET
Addr
Figure 13-15. Right Justified, Unsigned Result Format (RJURR)
MSB
1
0
1
Field S
SRESET
Addr
Figure 13-16. Left Justified, Signed Result Format (LJSRR)
1
S = Sign bit.
MSB
1
0
Field
SRESET
Addr
Figure 13-17. Left Justified, Unsigned Result Register (LJURR)
The three result data formats are produced by routing the RAM bits onto the data bus. The
software chooses among the three formats by reading the result at the memory address
which produces the desired data alignment.
MOTOROLA Chapter 13. Queued Analog-to-Digital Converter Legacy Mode Operation
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
2
3
4
5
0000_00
0x30 4A80–4AFF (RJURR_A)
2
3
4
5
RESULT
Undefined
0x30 4B00–4B7F (LJSRR_A)
2
3
4
5
RESULT
Undefined
0x30 4B80–4BFF (LJURR_A)
Programming the QADC64E Registers
6
7
8
9
6
7
8
9
6
7
8
9
10
11
12
13
RESULT
Undefined
10
11
12
13
00_0000
10
11
12
13
00_0000
14
LSB
15
14
LSB
15
14
LSB
15
13-31

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