Instruction Set Summary - Motorola MPC533 Reference Manual

Instruction Set
Computational instructions do not modify memory. To use a memory operand in a
computation and then modify the same or another memory location, the memory contents
must be loaded into a register, modified, and then written back to the target location with
distinct instructions.
MPC500 processors follow the program flow when they are in the normal execution state.
However, the flow of instructions can be interrupted directly by the execution of an
instruction or by an asynchronous event. Either kind of exception may cause one of several
components of the system software to be invoked.
3.10.1

Instruction Set Summary

Table 3-19 provides a summary of RCPU instructions. Refer to the RCPU Reference
Manual for a detailed description of the instruction set.
Mnemonic
add (add. addo addo.)
addc (addc. addco addco.)
adde (adde. addeo addeo.)
addi
addic
addic.
addis
addme (addme. addmeo addmeo.)
addze (addze. addzeo addzeo.)
and (and.)
andc (andc.)
andi.
andis.
b (ba bl bla)
bc (bca bcl bcla)
bcctr (bcctrl)
bclr (bclrl)
cmp
cmpi
cmpl
cmpli
cntlzw (cntlzw.)
3-32
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table 3-19. Instruction Set Summary
Operand Syntax
rD,rA,rB
rD,rA,rB
rD,rA,rB
rD,rA,SIMM
rD,rA,SIMM
rD,rA,SIMM
rD,rA,SIMM
rD,rA
rD,rA
rA,rS,rB
rA,rS,rB
rA,rS,UIMM
rA,rS,UIMM
target_addr
BO,BI,target_addr
BO,BI
BO,BI
crfD,L,rA,rB
crfD,L,rA,SIMM
crfD,L,rA,rB
crfD,L,rA,UIMM
rA,rS
MPC533 Reference Manual
Name
Add
Add Carrying
Add Extended
Add Immediate
Add Immediate Carrying
Add Immediate Carrying and Record
Add Immediate Shifted
Add to Minus One Extended
Add to Zero Extended
AND
AND with Complement
AND Immediate
AND Immediate Shifted
Branch
Branch Conditional
Branch Conditional to Count Register
Branch Conditional to Link Register
Compare
Compare Immediate
Compare Logical
Compare Logical Immediate
Count Leading Zeros Word
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