Table of Contents
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Paragraph
Number
7.1
Reset Operation.................................................................................................... 7-1
7.1.1
Power-On Reset ............................................................................................... 7-1
7.1.2
Hard Reset........................................................................................................ 7-2
7.1.3
Soft Reset......................................................................................................... 7-3
7.1.4
Loss of PLL Lock ............................................................................................ 7-3
7.1.5
On-Chip Clock Switch..................................................................................... 7-3
7.1.6
Software Watchdog Reset ................................................................................ 7-3
7.1.7
Checkstop Reset............................................................................................... 7-3
7.1.8
Debug Port Hard Reset .................................................................................... 7-3
7.1.9
Debug Port Soft Reset...................................................................................... 7-4
7.1.10
JTAG Reset ...................................................................................................... 7-4
7.1.11
ILBC Illegal Bit Change .................................................................................. 7-4
7.2
Reset Actions Summary....................................................................................... 7-4
7.3
Data Coherency During Reset ............................................................................. 7-5
7.4
Reset Status Register (RSR) ................................................................................ 7-5
7.5
Reset Configuration ............................................................................................. 7-7
7.5.1
Hard Reset Configuration ................................................................................ 7-7
7.5.2
Hard Reset Configuration Word (RCW) ....................................................... 7-11
7.5.3
Soft Reset Configuration ............................................................................... 7-13
8.1
System Clock Sources ......................................................................................... 8-3
8.2
System PLL.......................................................................................................... 8-3
8.2.1
Frequency Multiplication................................................................................. 8-4
8.2.2
Skew Elimination............................................................................................. 8-4
8.2.3
Pre-Divider....................................................................................................... 8-4
8.2.4
PLL Block Diagram......................................................................................... 8-4
8.2.5
PLL Pins .......................................................................................................... 8-6
8.3
System Clock During PLL Loss of Lock............................................................. 8-6
8.4
Low-Power Divider ............................................................................................. 8-7
8.5
Internal Clock Signals.......................................................................................... 8-7
8.5.1
General System Clocks.................................................................................. 8-11
8.5.2
Clock Out (CLKOUT) ................................................................................... 8-13
8.5.3
Engineering Clock (ENGCLK) ..................................................................... 8-14
8.6
Clock Source Switching..................................................................................... 8-14
8.7
Low-Power Modes............................................................................................. 8-16
8.7.1
Entering a Low-Power Mode......................................................................... 8-17
x
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Contents
Title
Chapter 7
Reset
Chapter 8
Clocks and Power Control
MPC533 Reference Manual
Page
Number
MOTOROLA
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