Motorola MPC533 Reference Manual page 442

Programming Model
assert a data error exception on the U-bus.The entire 32-bit location must be defined as
reserved in order for a data error exception to be asserted.
Unimplemented bits in a register return zero when read.
12.5.1 UIMB Module Configuration Register (UMCR)
The UIMB module configuration register (UMCR) is accessible in supervisor mode only.
MSB 1
0
Field STOP IRQMUX
SRESET 0 00
16 17 18
Field
SRESET
Addr
Figure 12-7. UIMB Module Configuration Register (UMCR)
Bits Name
0 STOP Stop enable.
0 Enable system clock for IMB bus
1 Disable IMB system clock
To avoid complications at restart and data corruption, system software must stop each slave on
the IMB before setting the STOP bit. Software must also ensure that all IMB interrupts have been
serviced before setting this bit.
1:2 IRQMUX Interrupt request multiplexing. These bits control the multiplexing of the 32 possible interrupt
requests onto the eight IMB interrupt request lines.
00 Disables the multiplexing scheme on the interrupt controller within this interface. What this
01 Enables the IMB IRQ control logic to perform a 2-to-1 multiplexing to allow transferring of 16
10 Enables the IMB IRQ control logic to perform a 3-to-1 multiplexing to allow transferring of 24
11 Enables the IMB IRQ control logic to perform a 4-to-1 multiplexing to allow transferring of 32
3 HSPEED Half speed. The HSPEED bit controls the frequency at which the IMB3 runs with respect to the
U-bus. This is a modify-once bit. Software can write the reset value of this bit any number of times.
However, once logic 0 is written to this location, any attempt to rewrite this bit to a logic 1 will have
no effect.
0 IMB frequency is the same as that of the U-bus
1 IMB frequency is one half that of the U-bus
4:31 — Reserved
12-8
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
2 3 4 5
HSPEED
1
19 20 21
Table 12-6. UMCR Bit Descriptions
means is that the IMB IRQ [0:7] signals are non-multiplexed, only providing 8 [0:7] interrupt
request lines to the interrupt controller
[0:15] interrupt sources
[0:23]interrupt sources
[0:31] interrupt sources
MPC533 Reference Manual
6 7 8 9
0000_0000_0000
22 23 24 25
—
0000_0000_0000_0000
0x30 7F80
Description
10 11 12 13
—
26 27 28 29
MOTOROLA
14 15
30 LSB
31