Motorola MPC533 Reference Manual page 812

PPM Registers
Table 18-3. PPMPCR Bit Descriptions (continued)
Bits Name
9 CP
10 CM
11:15 —
1
Enable RX.
(a) If ENRX is disabled, no data will shift into the PPM.
(b) If ENRX is asserted while ENTX=1, the first data bit received will be the data that is transmitted from the PPM, and
not RX0. See Figure 18-10. To receive the first data frame correctly, ENRX and ENTX should be set simultaneously.
2
Enable TX.
(a) If ENTX is disabled, no data will shift out of the PPM and the PPM output signals, PPM_TX0 and PPM_TX1 will be
high.
(b) If ENTX is asserted while ENRX = 1, the first data bits transmitted out of the PPM will be the data that was received
into the PPM. See Figure 18-11. To transmit the first data frame correctly, set ENTX and ENRX simultaneously.
18-12
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Clock Phase. This bit selects one of two fundamentally different transfer formats. Refer to
figures Figure 18-12 and Figure 18-13.
0 = Valid data can be latched on the transition of TCLK from inactive phase to active phase.
1 = Valid data can be latched on the transition of TCLK from active phase to inactive phase.
Continuous Mode. When this bit is set and SPI mode is enabled, the transfer of data through
the PPM depends on the value of PPMPCR[STR].
0 = Non-continuous mode (default). Transmit and/or receive one data frame when STR = 1.
(STR will be automatically cleared by the PPM after the transfer of one data frame.)
1 = Data will continuously be transmitted and/or received as long as Transmit and Receive
are enabled.
Refer to Table 18-5 for more information.
Reserved
Table 18-4. SAMP[0:2] Bit Settings
SAMP[0:2]
000
001
010
011
100 – 111
MPC533 Reference Manual
Description
Sample Rate
Every TCLK
Every 2 TCLK
Every 4 TCLK
Every 8 TCLK
Every 16 TCLK
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