Motorola MPC533 Reference Manual page 829

Table 19-3. UC3FMCR Bit Descriptions (continued)
Bits Name
6:7 CENSOR Censor accesses. The CENSOR[0:1] bits are implemented using non-volatile register bits or CAM
cells. The reset state of CENSOR[0:1] is user defined by the contents stored in the NVM register
bits.
CENSOR is not writable but the NVM register's data can be set or cleared to the desired reset state.
Reading CENSOR while setting or clearing with the high voltage applied (CSC = 1 and HVS = 1)
will return 0's.
00 cleared censorship, UC3F array access allowed only if device is in uncensored mode
01 no censorship, all UC3F array accesses allowed
10 no censorship, all UC3F array accesses allowed
11 information censorship, UC3F array access allowed only if device is in uncensored mode
8:15 SUPV Supervisor space. The SUPV bits are used to assign supervisor space restrictions for each block
of the UC3F array. The index for the SUPV bit field is used to determine block assignment. For
example, SUPV[0] is used for the supervisor space assignment of array block 0, while SUPV[4] is
used for array block 4 Supervisor space assignment.
Array block M is mapped into supervisor address space when SUPV[M] = 1, and only supervisor
accesses are allowed to array block M. If SUPV[M] = 0, then array block M is mapped into
unrestricted address space which allows both supervisor and user accesses to array block M.
The SUPV bits are not actually used in the UC3F EEPROM module but are used by the BIU to
determine access restrictions to UC3F array on a blockwise basis. The block addresses are
decoded in the BIU to determine which array block is selected, and the selected block's SUPV bit
is compared with the address space attributes to determine validity of an array access.
When the small block function is enabled, the enabled small block portion of an array block is not
controlled by the SUPV bit corresponding to the array block containing that small block. This
particular small block is controlled by the appropriate SBSUPV bit while the remainder of that array
block is controlled by its SUPV bit.
0 array block M is placed in unrestricted address space
1 array block M is placed in supervisor address space
16:23 DATA Data space. The DATA bits are write protected by LOCK and CSC. Writes to DATA have no effect
if LOCK = 0 or CSC = 1. The DATA bits may be read whenever the registers are enabled.
Each array block of the UC3F EEPROM may be mapped into data or data and instruction address
space. When array block M is mapped into data address space (DATA[M] = 1), only data accesses
will be allowed. When array block M is mapped into both Data and Instruction address space
(DATA[M] = 0), both data and instruction accesses will be allowed.
The DATA bits are not actually used in the UC3F EEPROM module but are used by the BIU to
determine access restrictions to UC3F array on a blockwise basis. The block addresses are
decoded in the BIU to determine which array block is selected, and the selected block's DATA bit
is compared with the address space attributes to determine validity of an array access.
When the small block function is enabled, the enabled small block portion of an array block is not
controlled by the DATA bit corresponding to the array block containing that small block. This
particular small block is controlled by the appropriate SBDATA bit while the remainder of that array
block is controlled by its DATA bit.
0 array block m is placed in both data and instruction address spaces
1 array block m is placed in data address space
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Chapter 19. CDR3 Flash (UC3F) EEPROM
Description
Programming Model
19-7