Motorola MPC533 Reference Manual page 658

Serial Communication Interface
None of the status bits are cleared by reading a status bit while
it is set and then writing zero to that same bit. Instead, the
procedure outlined above must be followed. Note further that
reading either byte of SCxSR causes all 16 bits to be accessed,
and any status bits already set in either byte are armed to clear
on a subsequent read or write of SCxDR.
MSB 1
0
Field
SRESET
Addr
Bits Name
0:6 — Reserved
7 TDRE Transmit data register empty. TDRE is set when the byte in TDRx is transferred to the transmit
serial shifter. If this bit is zero, the transfer is yet to occur and a write to TDRx will overwrite the
previous value. New data is not transmitted if TDRx is written without first clearing TDRE.
0 Transmit data register still contains data to be sent to the transmit serial shifter.
1 A new character can now be written to the transmit data register.
For transmit queue operation, this bit should be ignored by software.
8 TC Transmit complete. TC is set when the transmitter finishes shifting out all data, queued preambles
(mark/idle-line), or queued breaks (logic zero).
0 SCI transmitter is busy.
1 SCI transmitter is idle.
For transmit queue operation, TC is cleared when SCxSR is read with TC set, followed by a write
to SCTQ[0:15].
9 RDRF Receive data register full. RDRF is set when the contents of the receive serial shifter are
transferred to register RDRx. If one or more errors are detected in the received word, the
appropriate flag(s) (NF, FE, or PF) are set within the same clock cycle.
0 Receive data register is empty or contains previously read data.
1 Receive data register contains new data.
For receiver queue operation, this bit should be ignored by software.
10 RAF Receiver active flag. RAF indicates whether the receiver is busy. This flag is set when the receiver
detects a possible start bit and is cleared when the chosen type of idle line is detected. RAF can
be used to reduce collisions in systems with multiple masters.
0 SCI receiver is idle.
1 SCI receiver is busy.
15-52
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
2 3 4 5 6
—
0000_000
0x30 500C; 0x30 5024
Figure 15-28. SCIx Status Register (SCxSR)
Table 15-26. SCxSR Bit Descriptions
MPC533 Reference Manual
NOTE
7 8 9
TDRE TC RDRF RAF IDLE
1 1 0
Description
10 11 12 13 14
OR NF FE
0 0 0 0
MOTOROLA
LSB
15
PF
0 0