Motorola MPC533 Reference Manual page 244

Memory Map and Register Definitions
Bits Name
0:7 PARTNUM This read-only field is mask programmed with a code corresponding to the part number of the
part on which the SIU is located. It is intended to help factory test and user code which is
sensitive to part changes. This changes when the part number changes. For example, it
would change if any new module is added, if the size of any memory module is changed. It
would not change if the part is changed to fix a bug in an existing module.
8:15 MASKNUM This read-only field is mask programmed with a code corresponding to the mask number of
the part. It is intended to help factory test and user code which is sensitive to part changes.
16:19 — Reserved
20 FLEN Flash enable is a read-write bit. The default state of FLEN is negated, meaning that the boot
is performed from external memory. This bit can be set at reset by the reset configuration
word.
0 On-chip flash memory is disabled, and all internal cycles to the allocated flash address
space are mapped to external memory
1 On-chip flash memory is enabled
21:22 — Reserved
23 — Reserved. This bit should be programmed to 0 at all times.
24:27 — Reserved
28:30 ISB This read-write field defines the base address of the internal memory space. The initial value
of this field can be configured at reset to one of eight addresses, and then can be changed
to any value by software. Internal base addresses are as follows:
000 0x0000 0000
001 0x0040 0000
010 0x0080 0000
011 0x00C0 0000
100 0x0100 0000
101 0x0140 0000
110 0x0180 0000
111 0x01C0 0000
31 — Reserved
6.2.2.1.3 External Master Control Register (EMCR)
The external master control register selects the external master modes and determines the
internal bus attributes for external-to-internal accesses.
6-30
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Table 6-12. IMMR Bit Descriptions
MPC533 Reference Manual
Description
MOTOROLA