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Debug support (DBG)
Bits 9:8 TURNROUND[1:0]: tristate period for SWDIO
0x0: 1 data bit period
0x1: 2 data bit periods
0x2: 3 data bit periods
0x3: 4 data bit periods
Bits 7:0 Reserved, must be kept at reset value.
36.4.5
DP target identification register (DP_TARGETIDR)
Address offset: 0x04
and DP_SELECTR.DPBANKSEL = 2
Reset value: 0x0497 0041
31
30
29
TREVISION[3:0]
r
r
r
15
14
13
TPARTNO[3:0]
r
r
r
Bits 31:28 TREVISION[3:0]: target revision
0x0: revision 1
Bits 27:12 TPARTNO[15:0]: target part number
0x4970: STM32WLEx
Bits 11:1 TDESIGNER[10:0]: target designer JEDEC code.
0x020: STMicroelectronics
Bit 0 Reserved, must be kept at reset value.
36.4.6
DP data link protocol identification register (DP_DLPIDR)
Address offset: 0x04
and DP_SELECTR.DPBANKSEL = 3
Reset value: 0x0000 0001
31
30
29
TINSTANCE[3:0]
r
r
r
15
14
13
Res.
Res.
Res.
Res.
Bits 31:28 TINSTANCE[3:0]: target instance number
Defines the instance number for this device in a multi-drop system.
0x0: Instance number 0
Bits 27:4 Reserved, must be kept at reset value.
1226/1306
28
27
26
25
r
r
r
r
12
11
10
9
r
r
r
r
28
27
26
25
Res.
Res.
Res.
r
12
11
10
9
Res.
Res.
Res.
24
23
22
TPARTNO[15:4]
r
r
r
8
7
6
TDESIGNER[10:0]
r
r
r
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
RM0461 Rev 5
21
20
19
18
r
r
r
r
5
4
3
2
r
r
r
r
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
PROTSVN[3:0]
r
r
RM0461
17
16
r
r
1
0
Res.
r
17
16
Res.
Res.
1
0
r
r
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