RM0461
NSS
SCK
BSY
MISO
SPE
TXE
4
DTx1
FTLVL
00
MOSI
RXNE
DMA or software control at Rx events
FRLVL
DMA Tx TICF
Assumptions for slave full-duplex communication example:
•
Data size > 8 bit
If DMA is used:
•
Number of Tx frames transacted by DMA is set to 3
•
Number of Rx frames transacted by DMA is set to 3
See also
and notes.
Serial peripheral interface / integrated interchip sound (SPI/I2S)
Figure 344. Slave full-duplex communication
MSB
DTx1
1
3
Enable Tx/Rx DMA or interrupts
DTx2
DTx3
10
11
10
DRx1
00
5
Communication diagrams on page 1171
2
MSB
DTx2
3
DMA or software control at Tx events
11
10
LSB
DRx2
LSB
DRx1
10
00
10
DMA Rx TICF
for details about common assumptions
RM0461 Rev 5
MSB
DTx3
00
DRx3
LSB
DRx2
DRx3
00
10
1
00
MSv32123V2
1173/1306
1212
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