RM0461
The address of the AP registers is composed as follows:
•
Bits [7:4]: content of the APBANKSEL[3:0] field in the DP_SELECTR register
(see
•
Bits [3:2]: content of the A(3:2) field of the APACC data register in the JTAG-DP
(see
(see
•
Bits [1:0]: always set to 0
The content of the APSEL[3:0] field of the DP_SELECTR register defines which MEM-AP is
being accessed.
Address
APBANKSEL
0x00
0x0
0x04
0x0
0x08
-
0x0C
0x0
0x10
0x1
0x14
0x1
0x18
0x1
0x1C
0x1
0x20
-
0x24 to
-
0xEC
0xF0
-
0xF4
-
0xF8
0xF
0xFC
0xF
Section
36.4.8)
Table 255: DP register map and reset
Table 251: Packet
request), depending on the debug interface used
Table 256. MEM-AP registers
A(3:2)
Name
0
AP_CSWR
1
AP_TAR
-
-
3
AP_DRWR
0
AP_BD0R
1
AP_BD1R
2
AP_BD2R
3
AP_BD3R
-
-
-
-
-
-
-
-
2
AP_BASER
3
AP_IDR
values) or of the SW-DP packet request
Control/status word register (see
Transfer address register (see
Target address for the bus transaction
Reserved
Data read/write register (see
Access to this register triggers a corresponding transaction on
the debug bus to the address in AP_TAR[31:0].
Banked data 0 register (see
Access to this register triggers a corresponding transaction on
the debug bus to the address in Address [31:4] = AP_TAR[31:4],
address [3:0] = 0x0.
Banked data 1 register (see
Access to this register triggers a corresponding transaction on
the debug bus to the address in Address [31:4] = AP_TAR[31:4],
address [3:0] = 0x4.
Banked data 2 register (see
Access to this register triggers a corresponding transaction on
the debug bus to the address in Address [31:4] = AP_TAR[31:4],
address [3:0] = 0x8.
Banked data 3 register (see
Access to this register triggers a corresponding transaction on
the debug bus to the address in Address [31:4] = AP_TAR[31:4],
address [3:0] = 0xC.
Reserved
Reserved
Reserved
Reserved
Debug base address register (RO) (see
Base address of the ROM table
Identification register (RO) (see
RM0461 Rev 5
Debug support (DBG)
Description
Section
36.5.1)
Section
36.5.2)
Section
36.5.3)
Section
36.5.4)
Section
36.5.4)
Section
36.5.4)
Section
36.5.4)
Section
36.5.5)
Section
36.5.6)
1231/1306
1291
Need help?
Do you have a question about the STM32WLEx and is the answer not in the manual?