Timer Mode - Renesas M16C FAMILY series Hardware Manual
16-bit single-chip microcomputer
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- User manual (380 pages) ,
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6
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2 /
8
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6
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12.2.1 Timer Mode
In timer mode, the timer counts a count source generated internally (see Table 12.6). Figure 12.18
shows TBiMR register in timer mode.
Table 12.6 Specifications in Timer Mode
Item
Count source
Count operation
Divide ratio
Count start condition
Count stop condition
Interrupt request generation timing
TBi
pin function
IN
Read from timer
Write to timer
NOTE:
1. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register.
Timer Bi Mode Register (i= 0 to 2)
b7
b6
b5
b4
b3
Figure 12.18 TBiMR Register in Timer Mode
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e
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2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
M
1
6
C
2 /
8
) B
f
, f
, f
, f
, f
1
2
8
32
C32
• Decrement
• When the timer underflows, it reloads the reload register contents and
continues counting
1/(n+1)
n: set value of TBi register (i= 0 to 2)
(Note)
Set TBiS bit
Set TBiS bit to "0" (stop counting)
Timer underflow
I/O port
Count value can be read by reading TBi register
• When not counting and until the 1st count source is input after counting start
Value written to TBi register is written to both reload register and counter
• When counting (after 1st count source input)
Value written to TBi register is written to only reload register
(Transferred to counter when reloaded next)
b2
b1
b0
Symbol
0
0
TB0MR to TB2MR
Bit Symbol
TMOD0
Operation mode select bit
TMOD1
MR0
No effect in timer mode
Can be set to "0" or "1"
MR1
TB0MR register
MR2
Set to "0" in timer mode
TB1MR, TB2MR registers
Nothing is assigned. When write, set to "0". When read, its
content is indeterminate
When write in timer mode, set to "0".
MR3
When read in timer mode, the content is indeterminate.
Count source select bit
TCK0
TCK1
page 116
f o
3
8
5
Specification
to "1" (start counting)
Address
039B
to 039D
16
16
Bit Name
b1 b0
0 0 : Timer mode or A/D trigger mode
b7 b6
0 0 : f
or f
1
0 1 : f
8
1 0 : f
32
1 1 : f
C32
0000
to FFFF
16
After Reset
00XX0000
2
Function
2
12. Timer
16
RW
RW
RW
RW
RW
RW
RO
RW
RW
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