Renesas M16C FAMILY series Hardware Manual page 197

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
Table 14.3 lists pin functions for the case where the multiple transfer clock output pin select function is
deselected. Table 14.4 lists the P6
Note that for a period from when the UARTi operation mode is selected to when transfer starts, the TxDi
pin outputs an "H". (If the N-channel open-drain output is selected, this pin is in a high-impedance state.)
Table 14.3 Pin Functions (When Not Select Multiple Transfer Clock Output Pin Function)
Pin name
TxDi (i = 0 to 2)
Serial data output
(P6 , P6 , P7 )
3 7 0
Serial data input
RxDi
(P6 , P6 , P7 )
2 6 1
CLKi
Transfer clock output
(P6 , P6 , P7 )
1 5 2
Transfer clock input
CTSi/RTSi
CTS input
(P6 , P6 , P7 )
0 4 3
RTS output
I/O port
NOTES:
1: When the U1MAP bit in PACR register is "1" (P7
Table 14.4 P6 Pin Functions
4
Pin function
CRD
P6
4
CTS
1
RTS
1
0 (2)
CTS
CLKS
1
NOTES:
1. When the U1MAP bit in PACR register is "1" (P7
2. In addition to this, set the CRD bit in the U0C0 register to "0" (CT0
CRS bit in the U0C0 register to "1" (RTS
3. When the CLKMD1 bit is set to "1" and the CLKMD0 bit is set to "0", the following logiclevels
are output:
• High if the CLKPOL bit in the U1C0 register is set to "0"
• Low if the CLKPOL bit in the U1C0 register is set to "1"
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
pin functions during clock synchronous serial I/O mode.
4
Function
(Outputs dummy data when performing reception only)
Set the PD6_2 bit and PD6_6 bit in the PD6 register, and PD7_1 bit in the PD7
register to "0"(Can be used as an input port when performing transmission only)
Set the CKDIR bit in the UiMR register to "0"
Set the CKDIR bit in the UiMR register to "1"
Set the PD6_1 bit and PD6_5 bit in the PD6 register, and the PD7_2 bit in the
PD7 register to "0"
Set the CRD bit in the UiC0 register to "0"
Set the CRS bit in the UiC0 register to "0"
Set the PD6_0 bit and PD6_4 bit in the PD6 register is set to "0", the PD7_3 bit
in the PD7 register to "0"
Set the CRD bit in the UiC0 register to "0"
Set the CRS bit in the UiC0 register to "1"
Set the CRD bit in the UiC0 register to "1"
(1)
Bit set value
U1C0 register
CRS RCSP
1 0
0 0 0
0 1 0
0 0 1
page 177
f o 3 8 5
Method of selection
to P7 ), UART1 pin is assgined to P7
3 0
UCON register
CLKMD0
CLKMD1
0
0
0
0
(3) 1
1
to P7 ), this table lists the P7
3 0
selected).
0
14. Serial I/O
(1)
to P7 .
3 0
PD6 register
PD6_4
Input: 0, Output: 1
0
0
functions.
0
/RT0 enabled) and the
0 0