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18.6.6 DMA Transfer
In EW mode 1, do not generate a DMA transfer while the FMR00 bit in the FMR0 register is set to "0".
(during the auto-programming or auto-erasing).
18.6.7 Writing Command and Data
Write the command codes and data to even addresses in the user ROM area.
18.6.8 Wait Mode
When entering wait mode, set the FMR01 bit to "0" (CPU rewrite mode disabled) before executing the
WAIT instruction.
18.6.9 Stop Mode
When entering stop mode, the following settings are required:
• Set the FMR01 bit to "0" (CPU rewrite mode disabled) and disable the DMA transfer before setting the
CM10 bit to "1" (stop mode).
18.6.10 Low Power Consumption Mode and On-Chip Oscillator-Low Power Consumption Mode
If the CM05 bit is set to "1" (main clock stopped), do not execute the following commands.
• Program
• Block erase
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18. Flash Memory Version