Bits 2,3 : Port Function Select Bits Ped, Pec - Renesas M16C FAMILY series Hardware Manual

16-bit single-chip microcomputer
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M
1
6
C
2 /
8
G
o r
u
p
(
M
1
6
C
In receive mode, ACK bit = 1 WIT bit = 0
ACK-BIT bit
PIN flag
Internal WAIT flag
2
I
C bus interface
interrupt request signal
The writing signal of
the S00 register
In receive mode, ACK bit = 1 WIT bit = 1
ACK-BIT bit
PIN flag
Internal WAIT flag
2
I
C bus interface
interrupt request signal
The writing signal of
the S00 register
The writing signal of the S2
0 register
Figure 16.12 The timing of the interrupt generation at the completion of the data receive

16.6.3 Bits 2,3 : Port Function Select Bits PED, PEC

If the ES0 bit in the S1D0 register is set to "1" (I
output port. When the PED bit is set to "1" and the SCL
is set to "1". Then the setting values of P2_0 and P2_1 bits in the port P2 register are output to the I
bus, regardless of he internal SCL/SDA output signals. (SCL/SDA pins are onnected to I
circuit)
The bus data can be read by reading the port pi direction register in input mode, regardless of the setting
values of the PED and PEC bits. Table 16.5 shows the port specification.
Table 16.5 Port specifications
P
n i
N
a
m
e
P
2
0
P
n i
N
a
m
e
P
2
1
R
e
. v
2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
M
1
6
C
2 /
8
) B
7 clock
8 clock
S
CL
7 bit
8 bit
S
DA
7 clock
8 clock
S
CL
7 bit
8 bit
S
DA
NOTES:
1. Do not write to the
E
S
9
B
t i
P
E
D
B
0
-
1
0
1
1
E
S
0
B
t i
P
E
C
B
0
-
1
0
1
1
page 268
f o
3
8
5
ACK
clock
ACK bit
ACK
clock
1)
2
clock control register except the bit ACK-BIT.
I
C0
2
C bus interface enabled), the SDA
functions as an output port when the PEC bit
MM
P
2
P
o
t r
i D
e r
t c
o i
n
0
t i
R
e
g
t s i
r e
0
1 /
-
-
P
2
P
o
t r
i D
e r
t c
o i
n
1
t i
R
e
g
t s i
r e
0
1 /
-
-
2
16. MULTI-MASTER I
C bus INTERFACE
1 clock
1 bit
1 bit
2)
MM
F
u
n
t c
o i
P
o
t r
/ I
O
u f
n
t c
o i
n
S
/ I
O
u f
n
t c
o i
n
D
A
S
n i
p
t u
u f
n
t c
o i
, n
p
o
t r
D
A
F
u
n
t c
o i
n
P
o
t r
/ I
O
u f
n
t c
o i
n
S
/ I
O
u f
n
t c
o i
n
C
L
S
n i
p
t u
u f
n
t c
o i
, n
p
o
t r
C
L
functions as an
2
C
2
C bus interface
n
o
u
p t
t u
u f
n
t c
o i
n
o
u
p t
t u
u f
n
c
o i
n

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