Renesas M16C FAMILY series Hardware Manual page 238

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
f
AD
V
REF
VCUT=0
AV
SS
VCUT=1
Addresses
(03C1 to 03C0
16
(03C3 to 03C2
16
(03C5 to 03C4
16
(03C7 to 03C6
16
(03C9 to 03C8
16
(03CB to 03CA
16
(03CD to 03CC
16
(03CF to 03CE
16
Port P0 group
AN0
0
AN0
1
AN0
2
AN0
3
AN0
4
AN0
5
AN0
6
AN0
7
Port P1/Port P9
group
(1)
AN2
0
AN2
1
AN2
2
AN2
3
AN2
4
AN2
5
AN2
6
AN2
7
NOTES:
1. Port P1/Port P9 group is available for only 80-pin/85-pin packages.
Figure 15.1 A/D Converter Block Diagram
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
A/D conversion rate
selection
CKS2=0
1/2
1/3
CKS2=1
Resistor ladder
Successive conversion register
A/D register 0(16)
)
16
)
A/D register 1(16)
16
) A/D register 2(16)
16
A/D register 3(16)
)
16
)
A/D register 4(16)
16
A/D register 5(16)
)
16
A/D register 6(16)
)
16
) A/D register 7(16)
16
Data bus high-order
Data bus low-order
Port P10 group
AN
0
AN
1
AN
2
CH2 to CH0
AN
3
=000
2
AN
4
=001
2
AN
5
=010
2
AN
6
=011
2
AN
7
=100
2
=101
2
=110
2
=111
2
CH2 to CH0
=000
2
=001
2
=010
2
=011
2
=100
2
=101
2
=110
2
=111
2
page 218
f o 3 8 5
CKS0=1
1/2
CKS0=0
ADCON1 register
(address 03D7 )
16
ADCON0 register
(address 03D6 )
16
Decoder
for A/D register
ADCON2 register
(address 03D4 )
16
Decoder
for channel
selection
CH2 to CH0
=000
2
ADGSEL1 to ADGSEL0=00
=001
2
=010
2
=011
2
=100
2
=101
2
=110
2
ADGSEL1 to ADGSEL0=10
=111
2
ADGSEL1 to ADGSEL0=11
ADGSEL1 to ADGSEL0=00
ADGSEL1 to ADGSEL0=10
ADGSEL1 to ADGSEL0=11
15. A/D Converter
CKS1=1
ø
AD
CKS1=0
V
ref
Comparator 0
V
IN
2
2
SSE = 1
CH2 to CH0=001
2
2
2
V 1
IN
Comparator 1
2
2