Timer; Timer A - Renesas M16C FAMILY series Hardware Manual

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20.6 Timer

20.6.1 Timer A

20.6.1.1 Timer A (Timer Mode)
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
(i = 0 to 4) register and the TAi register before setting the TAiS bit in the TABSR register to "1" (count
starts).
Always make sure the TAiMR register is modified while the TAiS bit remains "0" (count stops)
regardless whether after reset or not.
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always "FFFF
counting, the read value is the one that has been set in the register.
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to "1"
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
20.6.1.2 Timer A (Event Counter Mode)
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
(i = 0 to 4) register, the TAi register, the UDF register, the ONSF register TAZIE, TA0TGL and
TA0TGH bits and the TRGSR register before setting the TAiS bit in the TABSR register to "1" (count
starts).
Always make sure the TAiMR register, the UDF register, the ONSF register TAZIE, TA0TGL and
TA0TGH bits and the TRGSR register are modified while the TAiS bit remains "0" (count stops)
regardless whether after reset or not.
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always "FFFF
flows. If the TAi register is read after setting a value in it, but before the counter starts counting, the
read value is the one that has been set in the register.
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to "1"
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
". If the TAi register is read after setting a value in it, but before the counter starts
16
" when the timer counter underflows and "0000
16
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20. Precautions
, TA2 and TA4
OUT OUT
" when the timer counter over-
16
, TA2 and TA4
OUT OUT
OUT
OUT