Renesas M16C FAMILY series Hardware Manual page 112

16-bit single-chip microcomputer
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M
1
6
C
2 /
8
G
o r
u
p
(
M
1
6
C
DMAi Source Pointer (i = 0, 1)
(b19)
(b23)
b3
b7
NOTES:
1. If the DSD bit in the DMiCON register is "0" (fixed), this register can only be written to when the DMAE bit in the
DMiCON register is set to "0" (DMA disabled).
If the DSD bit is set to "1" (forward direction), this register can be written to at any time.
If the DSD bit is set to "1" and the DMAE bit is set to "1" (DMA enabled), the DMAi forward address pointer can be
read from this register. Otherwise, the value written to it can be read.
DMAi Destination Pointer (i = 0, 1)
(b19)
(b23)
b7
b3
NOTES:
1. If the DAD bit in the DMiCON register is "0" (fixed), this register can only be written to when the DMAE bit in the
DMiCON register is set to "0"(DMA disabled).
If the DAD bit is set to "1" (forward direction), this register can be written to at any time.
If the DAD bit is set to "1" and the DMAE bit is set to "1" (DMA enabled), the DMAi forward address pointer can be
read from this register. Otherwise, the value written to it can be read.
DMAi Transfer Counter (i = 0, 1)
(b15)
b7
Figure 11.4 SAR0, SAR1, DAR0, DAR1, TCR0, and TCR1 Registers
R
e
. v
2
0 .
0
J
a
. n
3
, 1
2
0
0
7
R
E
J
0
9
B
0
0
4
7
0 -
2
0
0
2 /
, 8
M
1
6
C
2 /
8
) B
(1)
(b16)(b15)
(b8)
b0
b7
b0
Set the source address of transfer
Nothing is assigned. When write, set "0". When read, these contents
are "0".
(1)
(b16)
(b15)
(b8)
b0
b7
b0
Set the destination address of transfer
Nothing is assigned. When write, set "0". When read, these contents
are "0".
(b8)
b0
b7
b0
Set the transfer count minus 1. The written value is
stored in the DMAi transfer counter reload register,
and when the DMAE bit in the DMiCON register is
set to "1" (DMA enabled) or the DMAi transfer
counter underflows when the DMASL bit in the
DMiCON register is "1" (repeat transfer), the value
of the DMAi transfer counter reload register is
transferred to the DMAi transfer counter.
When read, the DMAi transfer counter is read.
page 92
f o
3
8
5
Symbol
b7
b0
SAR0
SAR1
Function
b7
b0
Symbol
DAR0
DAR1
Function
Symbol
Address
TCR0
0029
16
TCR1
0039
16
Function
Address
After Reset
0022
to 0020
Indeterminate
16
16
0032
to 0030
Indeterminate
16
16
Setting Range
00000
to FFFFF
16
16
Address
After Reset
0026
to 0024
Indeterminate
16
16
0036
to 0034
Indeterminate
16
16
Setting Range
00000
to FFFFF
16
16
After Reset
, 0028
Indeterminate
16
, 0038
Indeterminate
16
Setting Range
0000
to FFFF
16
16
11. DMAC
RW
RW
RW
RW
RW
RW

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