Renesas M16C FAMILY series Hardware Manual page 187

M 1 6 C 2 / 8 G o r u p ( M 1 6 C
1SP
STPS=0
SP
RxDi
STPS=1
2SP
2SP
SP SP
1SP
Figure 14.2 Block Diagram of UARTi (i = 0, 1) transmit/receive unit
R e . v 2 0 . 0 J a . n 3 , 1 2 0 0 7
R E J 0 9 B 0 0 4 7 0 - 2 0 0
2 / , 8 M 1 6 C 2 / 8 ) B
PAR
disabled
Clock
synchronous
type
PRYE=0
SP
PAR
UART
PRYE=1
enabled
0 0 0 0 0 0
PAR
STPS=1 enabled UART
PRYE=1
PAR
PRYE=0
Clock
STPS=0
synchronous
type
PAR
disabled
0
page 167
f o 3 8 5
Clock
synchronous type
UART (7 bits)
UART (8 bits)
UART (7 bits)
UART (9 bits)
Clock
synchronous type
UART (8 bits)
UART (9 bits)
0
D D D D
8 7 6 5
MSB/LSB conversion circuit
Data bus high-order bits
Data bus low-order bits
MSB/LSB conversion circuit
D D D
D
7 6 5
8
UART (8 bits)
UART (9 bits)
Clock synchronous
UART (9 bits)
type
UART (7 bits)
UART (7 bits)
UART (8 bits)
Clock synchronous
type
SMD2 to SMD0, STPS, PRYE, IOPOL, CKDIR : Bits in the UiMR
UARTi receive register
UARTi receive
D D D D D
4 3 2 1 0
buffer register
Address 03A6
Address 03A7
Address 03AE
Address 03AF
D D D D D
UARTi transmit
4 3 2 1 0
buffer register
Address 03A2
Address 03A3
Address 03AA
Address 03AB
UARTi transmit register
SP: Stop bit
PAR: Parity bit
14. Serial I/O
16
16
16
16
16
16
16
16
TxDi